发明名称 半導体装置
摘要 Probability of malfunction of a semiconductor storage device is reduced. A shielding layer is provided between a memory cell array (e.g., a memory cell array including a transistor formed using an oxide semiconductor material) and a peripheral circuit (e.g., a peripheral circuit including a transistor formed using a semiconductor substrate), which are stacked. With this structure, the memory cell array and the peripheral circuit can be shielded from radiation noise generated between the memory cell array and the peripheral circuit. Thus, probability of malfunction of the semiconductor storage device can be reduced.
申请公布号 JP6040300(B2) 申请公布日期 2016.12.07
申请号 JP20150182460 申请日期 2015.09.16
申请人 株式会社半導体エネルギー研究所 发明人 熱海 知昭;奥田 高
分类号 H01L21/8242;H01L21/336;H01L27/108;H01L29/786 主分类号 H01L21/8242
代理机构 代理人
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