Group III-N nanowire transistors

摘要

A group III-N nanowire is disposed on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first group III-N material, a source region electrically coupled with a first end of the channel region, and a drain region electrically coupled with a second end of the channel region. A second group III-N material on the first group III-N material serves as a charge inducing layer, and/or barrier layer on surfaces of nanowire. A gate insulator and/or gate conductor coaxially wraps completely around the nanowire within the channel region. Drain and source contacts may similarly coaxially wrap completely around the drain and source regions.

主权项

1. A method of forming a group III-N transistor on a substrate, the method comprising:
epitaxially growing a stack of semiconductor materials on the substrate, the stack comprising at least a first group III-N material; etching the stack to define a nanowire; epitaxially growing a second group III-N material on the first group III-N material along a channel region of the nanowire; and forming a gate conductor coaxially wrapping completely around the first semiconductor and over the second group III-N material, along a longitudinal channel length of the nanowire.