发明名称 |
Devices and methods related to a barrier for metallization of a gallium based semiconductor |
摘要 |
Disclosed are structures and methods related to a barrier layer for metallization of a selected semiconductor such as indium gallium phosphide (InGaP). In some embodiments, the barrier layer can include tantalum nitride (TaN). Such a barrier layer can provide desirable features such as barrier functionality, improved adhesion of a metal layer, reduced diffusion, reduced reactivity between the metal and InGaP, and stability during the fabrication process. In some embodiments, structures formed in such a manner can be configured as an emitter of a gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) or an on-die high-value capacitance element. |
申请公布号 |
US9461153(B2) |
申请公布日期 |
2016.10.04 |
申请号 |
US201213675814 |
申请日期 |
2012.11.13 |
申请人 |
Skyworks Solutions, Inc. |
发明人 |
Cismaru Cristian;Zampardi, Jr. Peter J. |
分类号 |
H01L29/737;H01L21/66;H04M1/02;H01L29/417;H01L29/66;H01L29/06 |
主分类号 |
H01L29/737 |
代理机构 |
Knobbe, Martens, Olson & Bear, LLP |
代理人 |
Knobbe, Martens, Olson & Bear, LLP |
主权项 |
1. A metallization structure comprising:
a selected semiconductor layer that includes wide bandgap semiconductor lattice-matched to gallium arsenide (GaAs) and that is part of an emitter of a heterojunction bipolar transistor (HBT), the emitter having a ledge that includes indium gallium phosphide (InGaP); a first GaAs layer underneath the selected semiconductor layer and that is part of a base of the HBT; a first metal layer disposed over and in electrical communication with the first GaAs layer, forming a base terminal of the HBT; a tantalum nitride (TaN) layer formed over the selected semiconductor layer; and a second metal layer formed over the TaN layer, forming an emitter terminal of the HBT, and having a portion covering the TaN layer that is nested within a region defined by a footprint of the first metal layer, the TaN layer arranged to separate the second metal layer from the selected semiconductor layer, and the TaN layer forming a barrier between the second metal layer and the selected semiconductor layer, the metallization structure forming a capacitor having a capacitance density of at least 2.0 fF/μm2 when capacitance is measured between the first metal layer and the second metal layer. |
地址 |
Woburn MA US |