Semiconductor memory device

摘要

A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows of each of the banks; an address latch circuit configured to latch a full address for specifying one of the word lines, the full address including a first address and a second address; and a control circuit configured to ignore a reset operation for the first address as a target of a set operation, and overwrite the first address in accordance with the set operation when receiving a first command for specifying a reset operation for a bank and a set operation for the first address.

主权项

1. A semiconductor memory device comprising:
banks each including a memory cell array; word lines connected to rows of each of the banks; an address latch circuit which latches address bits for identifying one of the word lines, the address bits including a first address portion and a second address portion; and a control circuit which is capable of receiving a precharge command and an active command in response to a clock signal, wherein: the precharge command includes a preceding command portion for identifying a precharge operation for a bank and a following command portion for setting the first address portion, the active command activates a word line in the bank, and the control circuit is capable of overwriting the first address portion until receiving the active command.