AVD hardmask for damascene patterning

摘要

A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having at least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point.

主权项

1. A method comprising:
forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask comprising a dielectric material on a surface of the dielectric layer; forming an opening in the hardmask and a trench in the dielectric layer; forming a sacrificial material in the trench and on the hardmask, wherein the sacrificed material is formed to a thickness greater than a depth of the trench to define a planar surface; forming a mask on the sacrificial material, the mask having at least one opening for via formation; etching the dielectric layer through the at least one opening in the mask to form at least one via in the dielectric layer to the contact point using the hardmask as a pattern; and after forming the at least one via to the contact point, forming an interconnect in the via with the hardmask remaining on the dielectric layer.