发明名称 |
WAFER LEVEL PACKAGE AND FABRICATION METHOD THEREOF |
摘要 |
A semiconductor device includes a semiconductor device includes an interposer having a first side and a second side opposite to the first side, wherein the interposer comprises a redistribution layer (RDL), and the RDL comprises a first passivation layer on the first side and a second passivation layer on the second side; at least one active chip mounted on the first passivation layer on the first side through a plurality of first bumps penetrating through the first passivation layer; a molding compound disposed on the first side, the molding compound covering the at least one active chip and a top surface of the first passivation layer; and a plurality of solder bumps mounted on the first passivation layer on the second side. |
申请公布号 |
US2016372395(A1) |
申请公布日期 |
2016.12.22 |
申请号 |
US201514745473 |
申请日期 |
2015.06.22 |
申请人 |
INOTERA MEMORIES, INC. |
发明人 |
Shih Shing-Yih;Shih Neng-Tai;Chiang Hsu |
分类号 |
H01L23/31;H05K1/18;H01L23/498 |
主分类号 |
H01L23/31 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device, comprising:
an interposer having a first side and a second side opposite to the first side, wherein the interposer comprises a redistribution layer (RDL), and the RDL comprises a first passivation layer on the first side and a second passivation layer on the second side; at least one active chip mounted on the first passivation layer on the first side through a plurality of first bumps penetrating through the first passivation layer; a molding compound disposed on the first side, the molding compound covering the at least one active chip and a top surface of the first passivation layer; and a plurality of solder bumps mounted on the first passivation layer on the second side. |
地址 |
Taoyuan City TW |