ReRAM

摘要

PROBLEM TO BE SOLVED: To prevent an interval between ReRAM elements from becoming against the rule, by adding a simple alteration to the arrangement structure of electrodes(vias) and the ReRAM elements concerning a ReRAM, by working by applying a predefined working rule to a memory cell selection transistor array to be refined, and also by working by applying another working rule to the ReRAM elements. SOLUTION: The ReRAM includes: multilayered metal wiring layers M1-M3 formed on a memory cell selection transistor typified by a word line WL (a gate); and the ReRAM elements 7 arranged in the upper layer of the multilayered metal wiring layers M1-M3 and also formed at an element pitch PRwhich is wider than the pitch PLof the lower layers of the multilayered metal wiring layers M1-M3. COPYRIGHT: (C)2008,JPO&INPIT