Vertical FET Having Reduced On-Resistance

摘要

In one implementation, a vertical field-effect transistor (FET) includes a substrate having a drift region situated over a drain, a body region situated over the drift region and having source diffusions formed therein, a gate trench extending through the body region, and channel regions adjacent the gate trench. The channel regions are spaced apart along the gate trench by respective deep body implants. Each of the deep body implants is situated approximately under at least one of the source diffusions, and has a depth greater than a depth of the gate trench.

主权项

1. A vertical field-effect transistor (FET) comprising:
a substrate having a drift region situated over a drain, a body region situated over said drift region and having source diffusions formed therein, a gate trench extending through said body region, and channel regions adjacent said gate trench; said channel regions being spaced apart along said gate trench by respective deep body implants; each of said deep body implants being situated approximately under at least one of said source diffusions and having a depth greater than a depth of said gate trench.