System and method for secure control over performance state

摘要

The present disclosure relates to a method and system for securing a performance state change of one or more processors. A disclosed method includes intercepting a request for a change of a performance state of the processor and determining whether to execute the request based on a security condition of the processor. The performance state of the processor includes at least one of an operating voltage and an operating frequency. A disclosed system includes an operating system module operative to transmit a request for a performance state change of at least one processing core. The system includes performance state control logic in communication with the operating system module and operative to receive the request and to change the performance state of the at least one processing core based on the request. The computing system further includes performance state security logic operative to intercept the request transmitted from the operating system module to the performance state control logic and to selectively transmit the request to the performance state control logic based on a security condition of the computing system.

主权项

1. A method of securing a performance state change of a processor, the method comprising:
intercepting, by performance state security logic, a request for a change of a performance state of the processor, the performance state including at least one of an operating voltage and an operating frequency, the intercepting comprising blocking a transmission of the request for the change of the performance state to be transmitted over a first communication path to a first destination and routing the request for the change of the performance state over a second communication path to the first destination different from the first communication path; analyzing, by the performance state security logic, a security condition of the processor for an indication of an unauthorized access to the processor; and determining, by the performance state security logic, whether to execute the request based on the security condition of the processor.