| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a phase-change memory cell and a memory circuit which contribute to a reduction of current consumption and an improvement of operating margin during writing. <P>SOLUTION: A memory cell is disclosed which includes a pair of phase-change memory elements (GST1 and GST2), each being programmed by a current supplied from a power source (Vdd). A set voltage and a reset voltage outputted to a pair of complementary write bit lines (WBT and WBB) are applied respectively to gates of a pair of driver transistors (WN1 and WN2) that drive the pair of phase-change memory elements via a pair of write switches (WSN1 and WSN2) that are turned on when a write word line is activated. The reset voltage and the set voltage are generated in a write circuit by voltage drop of predetermined voltage levels different each other from a boosted voltage (Vpp) which is higher than the power supply voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT |
