发明名称 Interface system and method
摘要 An interface system has a first media access controller having a first MAC buffer for storing at least one first-type frame in a first frame format according to a first communication protocol. A time synchronization module is arranged to, upon detecting the start of the first-type frame, determine a first timestamp from a master clock signal and latch the first timestamp into a first timestamp register. A processor is arranged to: retrieve the first timestamp from the first timestamp register, and transfer a first-type frame between the first MAC buffer and a first local memory in a block-wise manner as a plurality of blocks. The processor is arranged to process the plurality of blocks of the first-type frame using the first timestamp as retrieved from the first timestamp register.
申请公布号 US9483209(B2) 申请公布日期 2016.11.01
申请号 US201414492601 申请日期 2014.09.22
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Edmiston Graham;Wrobel Heinz Klaus Richard
分类号 H04J3/06;G06F3/06 主分类号 H04J3/06
代理机构 代理人
主权项 1. An interface system, comprising: a first media access controller for providing a first communication interface over a first port using first-type frames according to a first communication protocol, the first media access controller having a first MAC buffer for storing at least one first-type frame in a first frame format according to the first communication protocol, a time synchronization module arranged to: detect a start of a first-type frame provided to the first media access controller,upon detecting the start of the first-type frame, determine a first timestamp from a master clock signal provided from a master clock unit, latch the first timestamp into a first timestamp register in the time synchronization module and keep the first timestamp in the first timestamp register at least until a start of a next first-type frame is detected, and a processor having a first local memory and being arranged to: retrieve the first timestamp from the first timestamp register,transfer a first-type frame between the first MAC buffer and the first local memory in a block-wise manner, the first-type frame being hereby copied as a plurality of blocks, andprocess the plurality of blocks of the first-type frame using the first timestamp as retrieved from the first timestamp register, and a second media access controller for providing a second communication interface over a second port using second-type frames according to a second communication protocol, the second media access controller having a second MAC buffer for storing at least one second-type frame in a second frame format according to the second communication protocol, and the time synchronization module further arranged to: detect a start of a second-type frame provided to the second media access controller,upon detecting the start of the second-type frame, determine a second timestamp from a master clock signal provided from a master clock unit, latch the second timestamp into a second timestamp register in the time synchronization module and keep the second timestamp in the second timestamp register at least until a start of a next second-type frame is detected, the processor having a second local memory and further arranged to: retrieve the second timestamp from the second timestamp register,transfer a second-type frame between the second MAC buffer and the second local memory in a block-wise manner, the second-type frame being hereby copied as a plurality of blocks, process the plurality of blocks of the second-type frame using the second timestamp as retrieved from the second timestamp register.
地址 Austin TX US