发明名称 PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO PROTECT SHADOW STACKS
摘要 A processor of an aspect includes a decode unit to decode an instruction. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the instruction, is to determine that an attempted change due to the instruction, to a shadow stack pointer of a shadow stack, would cause the shadow stack pointer to exceed an allowed range. The execution unit is also to take an exception in response to determining that the attempted change to the shadow stack pointer would cause the shadow stack pointer to exceed the allowed range. Other processors, methods, systems, and instructions are disclosed.
申请公布号 US2016381050(A1) 申请公布日期 2016.12.29
申请号 US201514752221 申请日期 2015.06.26
申请人 INTEL CORPORATION 发明人 SHANBHOGUE VEDVYAS;BRANDT JASON W.;SAHITA RAVI L.;HUNTLEY BARRY E.;PATEL BAIJU V.
分类号 H04L29/06;G06F3/06;G06F9/30 主分类号 H04L29/06
代理机构 代理人
主权项 1. A processor comprising: a decode unit to decode an instruction; and an execution unit coupled with the decode unit, the execution unit, in response to the instruction, to: determine that an attempted change due to the instruction, to a shadow stack pointer (SSP) of a shadow stack, would cause the SSP to exceed an allowed range; andtake an exception in response to determining that the attempted change to the SSP would cause the SSP to exceed the allowed range.
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