发明名称 POWER FACTOR CORRECTION CIRCUIT AND POWER SUPPLY DEVICE
摘要 A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.
申请公布号 US2016380531(A1) 申请公布日期 2016.12.29
申请号 US201615177543 申请日期 2016.06.09
申请人 Sharp Kabushiki Kaisha 发明人 KATAOKA Kohtaroh;NOMURA Masaru;WAKAIKI Shuji;IGARASHI Hiroki;SHIBATA Akihide;IWATA Hiroshi;SHIOMI Takeshi
分类号 H02M1/42 主分类号 H02M1/42
代理机构 代理人
主权项 1. A power factor correction circuit capable of switching an operation mode, the circuit comprising: first and second input terminals for inputting an input voltage; first and second output terminals; a coil; a switch circuit that, boosts the input voltage to generate a boosted voltage in cooperation with the coil; a first capacitor having one end connected to the first output terminal, and the other end connected to an intermediate node; and. a second capacitor having one end connected, to the intermediate node, and the other end connected to the second output terminal, wherein when a potential at the first input terminal is higher than a potential at the second input terminal in a first operation mode, the boosted voltage is applied to the two ends of the first capacitor such that a potential at the one end is higher than a potential at the other end, when the potential at the first input terminal is lower than the potential at the second input terminal in the first operation mode, the boosted voltage is applied to the two ends of the second capacitor such that a potential at the one end is higher than a potential at the other end, and in a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series such that the potential at the one end of the first capacitor is higher than the potential at the other end of the second capacitor.
地址 Osaka JP