发明名称 |
MEMORY CONTROLLER, MEMORY DEVICE, DATA TRANSFER SYSTEM, DATA TRANSFER METHOD, AND COMPUTER PROGRAM PRODUCT |
摘要 |
A memory controller that controls data transfer performed between a memory device and another memory device, the memory controller includes: an acquiring unit that acquires command information which contains first address information indicating a first memory area to be accessed during the data transfer; a determining unit that determines whether the first memory area belongs to a specific external address space which represents a specific address space in an external memory; and a converting unit that, when the first memory area belongs to the specific external address space, converts, based on conversion information indicating correspondence relationship between the specific external address space and a specific internal address space which represents a specific address space in the first memory device, the first address information into second address information indicating a second memory area belonging to the specific internal address space. |
申请公布号 |
US2016266827(A1) |
申请公布日期 |
2016.09.15 |
申请号 |
US201514922577 |
申请日期 |
2015.10.26 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
HASEGAWA Yohei;SAITO Yoshiki;ASANO Shigehiro |
分类号 |
G06F3/06;G06F12/08 |
主分类号 |
G06F3/06 |
代理机构 |
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代理人 |
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主权项 |
1. A memory controller that controls data transfer performed between a memory device and another memory device, the memory controller comprising:
an acquiring unit that acquires command information which contains first address information indicating a first memory area to be accessed during the data transfer; a determining unit that determines whether the first memory area belongs to a specific external address space which represents a specific address space in an external memory; and a converting unit that, when the first memory area belongs to the specific external address space, converts, based on conversion information indicating correspondence relationship between the specific external address space and a specific internal address space which represents a specific address space in the first memory device, the first address information into second address information indicating a second memory area belonging to the specific internal address space. |
地址 |
Minato-ku JP |