| 摘要 |
The antijamming counter comprises an input bus andchargers, each of them comprises a flip-flop, a NOT element, two AND elements, the outputs being connected correspondingly to setting and reset flip-flop inputs, a counter charger from the first to (n-k) and the second fromcomprises correspondingly the first and second OR elements. In the counter there are in addition-third OR elements, the third AND element and a decipher, the inputs being connected to direct flip-flop outputs of allchargers, each of them the flip-flop clock input being connected with an input bus, the first inputs of the first AND elements, except for chargers from the first to (charger, are connected with flip-flop inverted outputs. |
