发明名称 Signal processing device and method, and signal decoding device and method
摘要 A second-order Volterra filter has a quadratic section including a plurality of multiplication units that multiply a first input signal with a second input signal. One of the multiplication units employs a signal not delayed from the first input signal, as the second input signal. A remaining one of the multiplication units employs a signal delayed a preset time from the first input signal, as the second input signal. The one of the multiplication units includes a multiplier that multiplies the signal output from the one of the multiplication units and a signal output from each of one or more delay units, each with a preset coefficient. A step gain parameter for updating each preset coefficient of a multiplier of the remaining one of the multiplication units is twice a step gain parameter for updating each preset coefficient of the multiplier of the one of the multiplication units.
申请公布号 US7711042(B2) 申请公布日期 2010.05.04
申请号 US20050555096 申请日期 2005.03.24
申请人 SONY CORPORATION 发明人 KAJIWARA YOSHIYUKI
分类号 H03K5/159;G11B20/10;G11B20/18;H03H17/00;H03H17/02;H03H17/06;H03H21/00 主分类号 H03K5/159
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