发明名称 INPUT/OUTPUT CIRCUIT AND INPUT/OUTPUT DEVICE INCLUDING THE SAME
摘要 An input/output circuit according to an embodiment includes a plurality of memory cell units configured to independently perform output operations, each of the memory cell units including an input/output line, a selection circuit including a plurality of selection units, each selection unit setting a path to a global input/output line connected to each of the selection units, the number of the selection units being the same as the number of the memory cell units, the selection circuit selecting one of the plurality of memory cell units based on a path control signal and electrically connecting the input/output line of the selected memory cell unit to the global input/output lines of the plurality of selection units, and a plurality of input/output pad groups coupled to the global input/output lines.
申请公布号 US2016372166(A1) 申请公布日期 2016.12.22
申请号 US201514934570 申请日期 2015.11.06
申请人 SK hynix Inc. 发明人 LYM Sangkug
分类号 G11C7/10;G11C7/12;G11C8/10 主分类号 G11C7/10
代理机构 代理人
主权项 1. An input/output circuit, comprising: a plurality of memory cell units configured to independently perform output operations, each of the memory cell units comprising an input/output line; a selection circuit comprising a plurality of selection units, each selection unit setting a path to a global input/output line connected to each of the selection units, the number of the selection units being the same as the number of the memory cell units, the selection circuit selecting one of the plurality of memory cell units based on a path control signal and electrically connecting the input/output line of the selected memory cell unit to the global input/output lines of the plurality of selection units; and a plurality of input/output pad groups coupled to the global input/output lines.
地址 Icheon-si KR