发明名称 Transistor circuit with direct-coupled stages
摘要 A transistor circuit that ensures signal transmission between adjoining direct-coupled stages at a low supply voltage even when an input signal is in a high level. This transistor circuit is comprised of a first stage having a first transistor and a first load connected to a collector or drain of the first transistor, and a second stage having a second transistor. An input voltage is applied to a base or gate of the first transistor in the first stage. The first transistor produces a first output current flowing through the first load according to the input voltage, thereby outputting a first output voltage at the collector or drain of the first transistor The first output voltage from the first stage is applied to a base or gate of the second transistor in the second stage without using any coupling capacitor. The first load has a variable resistance responsive to a magnitude of a dc component of the first output current. When the magnitude of the dc component of the first output current is increased from a predetermined value due to a magnitude increase of the input voltage, thereby decreasing a magnitude of a dc component of the first output voltage, the variable resistance of the first load is decreased so as to compensate the decreased magnitude of the dc component of the first output voltage. The effect caused by the operating point shift is compensated.
申请公布号 US6396337(B1) 申请公布日期 2002.05.28
申请号 US19990404509 申请日期 1999.09.23
申请人 NEC CORPORATION 发明人 UCHIDA JUN
分类号 H03F3/195;H03D7/14;H03F3/19;H03F3/343;H03F3/45;H03G3/10;H04B1/18;(IPC1-7):G06G7/12;G06G7/26 主分类号 H03F3/195
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