发明名称 |
Method of programming a CMOS read only memory at the second metal layer in a two-metal process |
摘要 |
A CMOS ROM is fabricated and programmed using a two-metal fabrication process which is substantially equivalent to a conventional CMOS polysilicon gate manufacturing technique so that the CMOS ROM is advantageously fabricated in the same process steps that are used to fabricate the other, non-ROM circuits on an integrated circuit chip. In this method, multiple bit-lines in a first metal layer are formed which overlie a substrate containing the array of transistors. The bit-lines are connected to drain regions of the transistors. A dielectric insulating layer is formed over the substrate and the bit-lines and the dielectric insulating layer is perforated by vias which allow connecting to the first metal layer. Multiple word-lines and multiple reference voltage lines are formed in a second metal layer overlying the dielectric insulating layer. Either a word-line or a reference voltage line is programmably selected to connect to the gate of a transistor for each transistor of the multiple transistors.
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申请公布号 |
US5494842(A) |
申请公布日期 |
1996.02.27 |
申请号 |
US19950426356 |
申请日期 |
1995.04.21 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
AZMANOV, ZIV |
分类号 |
G11C17/12;H01L21/8246;H01L27/112;(IPC1-7):H01L21/824 |
主分类号 |
G11C17/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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