LATERAL HIGH VOLTAGE TRANSISTOR

摘要

A device and a method for forming a device are disclosed. The device includes a substrate with a high voltage (HV) device region. The HV device region is defined with first and second device isolation regions and an internal dielectric region which are shallow trench isolation (STI) regions. A HV transistor is disposed in the HV device region. The HV transistor includes a gate dielectric layer on the substrate, a gate disposed on the gate dielectric layer, and a source region disposed in the substrate adjacent to the gate and first device isolation region while a drain region disposed in the substrate adjacent to the second device isolation region. A drift well and a body well are disposed in the substrate. At least one buried RESURF region is disposed under the internal dielectric region.

主权项

1. A device comprising:
a substrate having a high voltage (HV) device region, wherein the HV device region is defined with first and second device isolation regions and an internal dielectric region, and wherein the device isolation regions and internal dielectric region are shallow trench isolation (STI) regions; a HV transistor disposed in the HV device region, wherein the HV transistor comprises
a gate disposed on the substrate,a source region disposed in the substrate adjacent to the gate and first device isolation region,a drain region disposed in the substrate adjacent to the second device isolation region; a drift well disposed in the substrate, wherein the drift well encompasses the drain region and extends under a portion of the gate; a body well disposed in the substrate, wherein the body well encompasses the source region and extends laterally toward the drift well; and at least one buried RESURF region disposed within the drift well, wherein the at least one buried RESURF region comprises a first buried RESURF region which is disposed under the internal dielectric region, wherein the first buried RESURF region is an extended buried RESURF region which comprises
a planar top surface which is contiguous and in direct contact with a bottom surface of the internal dielectric region,first and second edges that extend laterally beyond edges of the internal dielectric region and a vertical depth of the extended buried RESURF region is substantially constant for portions of the buried RESURF region that are under the internal dielectric region and portions of the buried RESURF region that extend beyond and are outside of the internal dielectric region, and the extended buried RESURF region effectively reduces electric fields that are caused by material discontinuities at the edges of the internal dielectric region.