发明名称 |
Method of fabricating semiconductor package, semiconductor package formed thereby, and semiconductor device including the same |
摘要 |
The method of fabricating a semiconductor package including preparing a semiconductor wafer having a first side and a second side, the second side facing the first side, and the semiconductor wafer including a through via exposed through the first side, forming trenches at cutting areas between chip areas and at edge areas of the semiconductor wafer on the first side, stacking a semiconductor chip on the through via, forming an under fill resin layer to fill a gap between the semiconductor chip and the semiconductor wafer and to cover a side of the semiconductor chip, and forming a molding layer to cover at least a portion of the under fill resin layer and to fill at least a portion of the respective trenches may be provided. |
申请公布号 |
US9508704(B2) |
申请公布日期 |
2016.11.29 |
申请号 |
US201514611585 |
申请日期 |
2015.02.02 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Chung Hyunsoo;Lee InYoung;Cho Taeje |
分类号 |
H01L21/34;H01L25/00;H01L25/065;H01L21/768;H01L21/306;H01L23/00;H01L21/56;H01L21/304;H01L23/31;H01L23/538;H01L23/498;H01L23/29;H01L25/10 |
主分类号 |
H01L21/34 |
代理机构 |
Harness, Dickey & Pierce, P.L.C. |
代理人 |
Harness, Dickey & Pierce, P.L.C. |
主权项 |
1. A method of fabricating a semiconductor package, the method comprising:
preparing a semiconductor wafer having a first side and a second side, the second side facing the first side, and the semiconductor wafer including a through via exposed at the first side; forming trenches at cutting areas between chip areas and at edge areas of the semiconductor wafer on the first side; stacking a semiconductor chip on the through via; forming an under fill resin layer to fill a gap between the semiconductor chip and the semiconductor wafer and to cover a side of the semiconductor chip; forming a molding layer to cover the under fill resin layer and filling at least a portion of the respective trenches; and polishing the second side of the semiconductor wafer until a thickness of the semiconductor wafer is equal to or less than a depth of each of the trenches to expose the through via. |
地址 |
Gyeonggi-Do KR |