发明名称 |
OVERLAY MARK FOR FORMING MULTI-LAYERED METAL LINE OF SEMICONDUCTOR DEVICE |
摘要 |
<p>An overlay mark for forming a multi-layered metal line of a semiconductor device is provided to enhance the yield of semiconductor device by implementing precisely alignment using a superior overlay mark. An overlay mark(16') for forming a multi-layered metal line of a semiconductor device is formed by arranging at least one bar(16a') at a scribe lane region. The bars are formed as a cave-in trench structure. The bars are formed constantly apart from one another so as to decrease the density of pattern. The line width of the bar is under 0.5 mum such that the density of pattern is decreased.</p> |
申请公布号 |
KR20080018431(A) |
申请公布日期 |
2008.02.28 |
申请号 |
KR20060080527 |
申请日期 |
2006.08.24 |
申请人 |
DONGBU ELECTRONICS CO., LTD. |
发明人 |
JEONG, YOUNG SEOK |
分类号 |
H01L21/027;H01L21/28;H01L21/304 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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