发明名称 |
CIRCUIT BOARD, PACKAGE SUBSTRATE AND ELECTRONIC DEVICE |
摘要 |
A circuit board, and a package substrate and an electronic device that includes a circuit board are disclosed. The circuit board includes a core layer, a base pattern layer disposed on the core layer and a through-hole conductor that goes through the core layer, the base pattern layer including a circuit pattern that includes a conductive pad on the through-hole conductor, an insulator layer including at least one insulating layer stacked on the core layer and the base pattern layer, and a laminated pattern layer including a plurality of vias and a laminated circuit pattern, the plurality of vias penetrating the insulating layer, and the laminated circuit pattern being disposed on the insulating layer and including a plurality of via pads formed on the vias respectively. |
申请公布号 |
US2016165723(A1) |
申请公布日期 |
2016.06.09 |
申请号 |
US201514955748 |
申请日期 |
2015.12.01 |
申请人 |
Samsung Electro-Mechanics Co., Ltd. |
发明人 |
ROMERO Christian;OH Kyung-Seob;LEE Jeong-Ho;KWEON Young-Do |
分类号 |
H05K1/11;H01L23/498 |
主分类号 |
H05K1/11 |
代理机构 |
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代理人 |
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主权项 |
1. A circuit board comprising:
a core layer; a base pattern layer disposed on said core layer and a through-hole conductor that goes through said core layer, said base pattern layer comprising a circuit pattern that comprises a conductive pad on said through-hole conductor; an insulator layer comprising at least one insulating layer stacked on said core layer and said base pattern layer; and a laminated pattern layer comprising a plurality of vias and a laminated circuit pattern, said plurality of vias penetrating said insulating layer, and said laminated circuit pattern being disposed on said insulating layer and comprising a plurality of via pads formed on said vias respectively, wherein at least one of said plurality of via pads is a common via pad formed over said conductor pad on said insulating layer; two or more of said plurality of vias are coupled to a lower part of said common via pad in parallel; two or more of said plurality of vias penetrate in parallel said insulating layers so as to constitute a parallel stack layer; and a portion of said parallel layer is coupled in parallel to said conductor pad. |
地址 |
Suwon-si KR |