| 摘要 |
PROBLEM TO BE SOLVED: To shorten a settling time and reduce an output offset voltage.SOLUTION: A bandpass filter circuit comprising a fully differential amplifier 10, resistances R1-R4 and capacitances C1-C4 has a resistance R5 connected at one end to a node X1 that is a common junction of the capacitance C1 and the resistance R1, and a resistance R6 connected at one end to a node X2 that is a common junction of the capacitance C2 and the resistance R2, and applies a first voltage V1 to the other ends of the resistances R5, R6. An NPN transistor Q1 is connected at an emitter to the node X1 and an NPN transistor Q2 is connected at an emitter to the node X2, and both transistors Q1, Q2 are fed with a supply voltage Vcc at collectors thereof and with a second voltage V2 at bases thereof. |
