发明名称 Bridge circuitry for translating between memory transactions of first type and memory transactions of a second type
摘要 A data processing apparatus 2 includes bridge circuitry 14, 16, 18 which serves to translate memory transactions of a first type (AXI) into memory transactions of a second type (PCI Express). The bridge circuitry includes translation circuitry 18 which maps at least some of the bits of attribute data of a memory transaction of the first type to unused bits within the significant bits of an address of the second type, which are unused to represent significant bits of the address of memory transactions of the first type.
申请公布号 US9507728(B2) 申请公布日期 2016.11.29
申请号 US201514736770 申请日期 2015.06.11
申请人 ARM Limited 发明人 Swaine Andrew Brookfield;Evans Gareth;Evans Matthew Lucien
分类号 G06F13/00;G06F12/10;G06F13/40 主分类号 G06F13/00
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. Apparatus for processing data comprising: bridge circuitry having a first port configured to transmit memory transactions of a first type, a second port configured to receive memory transactions of a second type and translation circuitry configured to translate between memory transactions of said first type and memory transactions of said second type; wherein said memory transactions of said first type specify X significant bits of address and A bits of attribute data, where X and A are both positive integer values; said memory transactions of said second type specify Y significant bits of address, where Y is a positive integer value and Y is greater than X; and said translation circuitry is configured to map at least some of said A bits of attribute data of a memory transaction of said first type to unused bits within said Y significant bit of address of a second type unused to represent said X significant bits of address of said memory transaction of said first type.
地址 Cambridge GB