| 摘要 |
PROBLEM TO BE SOLVED: To provide a DPLL circuit which can correctly detect the timing of a successively transmitted waveform even if a bridge tap is present on a transmission line. SOLUTION: This digital receiving device, characterized by that a digital signal processing part has a rise detection part 8 which discriminates a rise of a digital signal and a DPLL circuit has a signal discrimination part 9 which outputs a signal to a counter 5 only when discriminating the rise signal discriminated by the rise detection part 8, informs the DPLL circuit that a pattern '01' is detected by a DSP used for equalization in such a case and makes a phase comparison only when '1' of the pattern '01', and places the DPLL in operation only in correct rise timing, thereby generating an accurate small- fluctuation timing signal. |
