| 摘要 |
PROBLEM TO BE SOLVED: To provide an arithmetic processing unit that reduces memory access due to an unnecessary prefetch instruction.SOLUTION: An arithmetic processing unit 1 includes: an instruction decoding part 2 that decodes an instruction; an arithmetic part 3 that performs arithmetic on the basis of the instruction decoded by the instruction decoding part; an instruction holding part 4 that holds a memory access instruction to execute memory access to a main storage device 100 and a prefetch instruction, out of instructions decoded by the instruction decoding part; a prediction part 5 that predicts whether the memory access instruction decoded by the instruction decoding part is a target memory access instruction to data held in a cache memory 7; and an inhibition part 6 that inhibits, if a corresponding prefetch instruction that is a prefetch instruction corresponding to the target memory access instruction which is predicted by the prediction part is held by the instruction holding part, the execution of the corresponding prefetch instruction by the arithmetic part.SELECTED DRAWING: Figure 1 |
