发明名称 Amplifier circuit and multistage amplifier circuit
摘要 <p>An amplifier circuit includes a first FET of an enhancement type having a gate supplied with an input signal and a gate bias voltage and a drain via which an amplified output signal is output, and a second FET of the enhancement type having a drain connected to a drain voltage source, a source connected to the drain of the first FET, and a gate supplied with a control signal for controlling the drain voltage supplied to the first FET. &lt;IMAGE&gt;</p>
申请公布号 EP0818879(A2) 申请公布日期 1998.01.14
申请号 EP19970301156 申请日期 1997.02.21
申请人 FUJITSU LIMITED 发明人 KAWAI, TAKAHISA;OKAMOTO, ITSUO
分类号 H03F3/68;H03F1/30;H03F3/04;H03F3/193;H03F3/24;H03G1/00;(IPC1-7):H03G1/00 主分类号 H03F3/68
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