发明名称 |
Shallow trench isolation structure for a bipolar transistor |
摘要 |
<p>A semiconductor device has an isolation area having a shallow trench isolation (STI) structure for isolating device areas for transistor elements. The isolation area for a bipolar transistor (12) has a first annular trench (20a) encircling a n-type collector well (22), a second annular trench (20b) encircling the first annular trench (20a) and an annular p-type diffused region (21) disposed between the first annular trench (20a) and the second annular trench (20b) while in contact with the annular trenches (20a, 20b). The plurality of isolation trenches (20a, 20b) in a single isolation area prevents a dishing portion of the substrate after a CMP process without causing a short-circuit failure. <IMAGE></p> |
申请公布号 |
EP1094514(A2) |
申请公布日期 |
2001.04.25 |
申请号 |
EP20000122610 |
申请日期 |
2000.10.17 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
SUZUKI, HISAMITSU |
分类号 |
H01L21/331;H01L29/73;H01L21/76;H01L21/761;H01L21/762;H01L21/8222;H01L21/8249;H01L27/06;H01L29/732;(IPC1-7):H01L21/762;H01L29/06;H01L21/824 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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