<p>There is provided an IF counting method for realizing an IF counter having a smaller circuit configuration. The IF counter includes: a down-count type IF counting unit (1) for counting IF signals which have been divided; an IF counting period generation unit (2) for generating a period for counting the IF signals; an IF count upper limit value preset unit (3) for giving an initial value of a count start; a lower m-bit comparator (5) for comparing the information on the lower m bits of the count value to the information set in the upper/lower limit value difference preset unit; and a judgment unit (6) for judging whether the count value is within a predetermined range according to the information on the upper n+1-m bits of the count value and the information on the comparison result by the lower m-bit comparator (5).</p>
申请公布号
WO2005071839(A1)
申请公布日期
2005.08.04
申请号
WO2005JP00151
申请日期
2005.01.07
申请人
KABUSHIKI KAISHA TOYOTA JIDOSHOKKI;NIIGATA SEIMITSU CO., LTD.;GOTO, SHIGETAKA;MIYAGI, HIROSHI