发明名称 |
HIGH DENSITY MEMORY ARCHITECTURE USING BACK SIDE METAL LAYERS |
摘要 |
A microelectronic memory having metallization layers formed on a back side of a substrate, wherein the metallization layers on back side may be used for the formation of source lines and word lines. Such a configuration may allow for a reduction in bit cell area, a higher memory array density, and lower source line and word line resistances. Furthermore, such a configuration may also provide the flexibility to independently optimize interconnect performance for logic and memory circuits. |
申请公布号 |
WO2016195664(A1) |
申请公布日期 |
2016.12.08 |
申请号 |
WO2015US33757 |
申请日期 |
2015.06.02 |
申请人 |
INTEL CORPORATION;WANG, Yih;MORROW, Patrick |
发明人 |
WANG, Yih;MORROW, Patrick |
分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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