发明名称 |
METHOD AND SYSTEM FOR LINK SYNCHRONIZATION IN AN LTE-TDD ARCHITECTURE |
摘要 |
A method of detecting a synchronization switching pulse using a power detector in a time division duplexing (TDD) system includes receiving an input signal, detecting a power level associated with the input signal using a digital power meter, and determining a configuration associated with the input signal. The method also includes determining that a pulse width associated with the input signal is greater than a threshold, determining an offset associated with a special subframe configuration, and generating an estimated sync pulse. The method further includes forming a regenerated sync pulse, determining an error between the estimated sync pulse and the regenerated sync pulse, determining that the error is less than a threshold, and providing a lock detect. |
申请公布号 |
US2016360500(A1) |
申请公布日期 |
2016.12.08 |
申请号 |
US201615090402 |
申请日期 |
2016.04.04 |
申请人 |
Dali Systems Co. Ltd. |
发明人 |
Kim Wan-Jong;Stapleton Shawn Patrick |
分类号 |
H04W56/00;H04B7/04;H04B17/318;H04L5/14 |
主分类号 |
H04W56/00 |
代理机构 |
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代理人 |
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主权项 |
1. A method of generating a synchronization switching pulse in a time division duplexing (TDD) system, the method comprising:
receiving an input signal at an input port of a digital power meter; receiving, at the digital power meter, a power threshold level; measuring, using the digital power meter, a power level associated with the input signal; determining that the power level associated with the input signal exceeds the power threshold level; determining, for the input signal, a number of rising edges, a number of falling edges, locations of the rising edges, and locations of the falling edges; determining, for the input signal, one or more pulse widths measured between the locations of the rising edges and the falling edges; determining a downlink/uplink configuration associated with the input signal; determining that at least one of the one or more pulse widths is greater than a threshold; forming an estimated sync pulse; determining a special subframe configuration associated with the input signal; determining an offset; forming a regenerated sync pulse; determining, using an error detector, an error between the estimated sync pulse and the regenerated sync pulse; determining that the error is less than an error threshold; and providing the regenerated sync pulse as the synchronization switching pulse. |
地址 |
George Town KY |