| 摘要 |
PROBLEM TO BE SOLVED: To provide a function verification time prediction method capable of easily predicting a function verification time in a short time with high accuracy when verifying a function of a logic circuit by a logic simulator. SOLUTION: In a first step S1, a random input pattern is imparted to the logic simulator, and a first number of input events entered to the logic circuit and a first time required for function verification are found. In a second step S2, a second number of input events entered to the logic circuit when imparting the verifying input pattern prepared for the function verification of the logic circuit to the logic simulator in a stopping state of the function verification of the logic circuit is found. In a third step S3, a second time required for the case that the verifying input pattern is imparted to the logic simulator to perform the function verification of the logic circuit is predicted on the basis of the first number of the input events, the first time and the second number of the input events. In a fourth step S4, the second time is corrected on the basis of the number of input events entered to the logic circuit up to the middle and an actual time required for the function verification up to the middle, in the middle of the actual function verification. COPYRIGHT: (C)2005,JPO&NCIPI
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