发明名称 |
WAFER MIT INTEGRIERTEN SCHALTUNGEN UND RISSUNTERBRECHUNGSELEMENTEN |
摘要 |
A method for manufacturing integrated circuits ("IC") on wafers to manage crack damage in the ICs such that crack propagation into the IC active array is reduced or eliminated. The method provides for a defined separation or divide of the IC gate conductor from the IC crack stop or IC edge. The method is especially useful in managing crack damage induced through the delamination of one or more of the gate conductor surface interfaces as a result of the IC wafer dicing process. Circuits or chips manufactured according to the methods disclosed are also taught. |
申请公布号 |
DE60135368(D1) |
申请公布日期 |
2008.09.25 |
申请号 |
DE2001635368 |
申请日期 |
2001.11.13 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP.;INTERNATIONAL BUSINESS MACHINES CORP. |
发明人 |
GUTHRIE, WILLIAM;KLUWE, ANDREAS;RUPRECHT, MICHAEL |
分类号 |
H01L21/301;H01L23/58;H01L21/78 |
主分类号 |
H01L21/301 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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