发明名称 SIGNAL MODULATION CIRCUIT
摘要 Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtractor, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.
申请公布号 US2016241256(A1) 申请公布日期 2016.08.18
申请号 US201615137129 申请日期 2016.04.25
申请人 Onkyo Corporation 发明人 NAKANISHI Yoshinori;KAWAGUCHI Tsuyoshi;SEKIYA Mamoru
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项 1. A signal modulation circuit for performing delta sigma modulation on an input signal in synchronization with a clock signal to output the modulated signal, the circuit comprising: a subtractor for calculating a difference between the input signal and a feedback signal; an integrator for integrating an output signal from the subtractor; a zero level inserting circuit for inserting a zero level into the signal integrated by the integrator at timing synchronized with the clock signal; a quantizer for delaying the signal output from the zero level inserting circuit and quantizing the delayed signal; and a feedback circuit for feeding back the signal quantized by the quantizer to the input signal.
地址 Osaka JP