发明名称 PRE-TEST POWER-OPTIMIZED BIN REASSIGNMENT FOLLOWING SELECTIVE VOLTAGE BINNING
摘要 Disclosed is a method wherein selective voltage binning and leakage power screening of integrated circuit (IC) chips are performed. Additionally, pre-test power-optimized bin reassignments are made on a chip-by-chip basis. Specifically, a leakage power measurement of an IC chip selected from a voltage bin can is compared to a bin-specific leakage power screen value of the next slower voltage bin. If the leakage power measurement is higher, the IC chip will be left in the voltage bin to which it is currently assigned. If the leakage power measurement is lower, the IC chip will be reassigned to that next slower voltage bin. These processes can be iteratively repeated until no slower voltage bins are available or the IC chip cannot be reassigned. IC chips can subsequently be tested according to testing parameters, including the minimum test voltages, associated with the voltage bins to which they are finally assigned.
申请公布号 US2016313394(A1) 申请公布日期 2016.10.27
申请号 US201514695112 申请日期 2015.04.24
申请人 International Business Machines Corporation 发明人 Arsovski Igor;Bickford Jeanne P.;Grzymkowski Paul J.;Lichtensteiger Susan K.;McMahon Robert J.;Perry Troy J.;Picozzi David M.;Sopchak Thomas G.
分类号 G01R31/28;H01L21/67 主分类号 G01R31/28
代理机构 代理人
主权项 1. A method comprising: performing selective voltage binning comprising assigning integrated circuit chips to voltage bins, said voltage bins comprising at least: a first voltage bin associated with a first performance range and a first leakage power screen value; anda second voltage bin associated with a second performance range that is slower than said first performance range and a second leakage power screen value that is lower than said first leakage power screen value; and, determining whether to reassign an integrated circuit chip from said first voltage bin to said second voltage bin based on a comparison of said first leakage power screen value to a leakage power measurement taken from said integrated circuit chip and on a comparison of said second leakage power screen value to said leakage power measurement.
地址 Armonk NY US