| 摘要 |
A method of designing a layout of a semiconductor integrated circuit having a hard macro includes acquiring a condition for permitting wirings with respect to a given region within the hardmacro, and searching a passing wiring that passes through the given region among the wirings that are arranged 6n the semiconductor integrated circuit. The method further includes allowing a normal passing wiring that satisfies the condition to pass through the hardmacro, and wiring a defaulting passing wiring that does not satisfy the condition so as to bypass the hard macro among the searched passing wirings.
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