| 发明名称 | Semiconductor memory device and operating method thereof | ||
| 摘要 | A semiconductor memory device may include a memory cell array, a plurality of page buffers respectively connected to a plurality of bit lines of the memory cell array, and a control logic configured to control the plurality of page buffers to perform an operation on the memory cell array, wherein each of the plurality of page buffers senses a current amount, which varies according to a potential level of a corresponding bit line among the plurality of bit lines, at a sensing node to read data, and a precharge potential level at the sensing node is adjusted according to a temperature. | ||
| 申请公布号 | US9478261(B1) | 申请公布日期 | 2016.10.25 |
| 申请号 | US201514963489 | 申请日期 | 2015.12.09 |
| 申请人 | SK HYNIX INC. | 发明人 | Lim Sung Yong;Baek Seung Hwan |
| 分类号 | G11C7/10;G11C7/04;G11C7/22;G11C7/12 | 主分类号 | G11C7/10 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A semiconductor memory device comprising: a memory cell array; a plurality of page buffers respectively connected to a plurality of bit lines of the memory cell array; and a control logic configured to control the plurality of page buffers to perform an operation on the memory cell array, wherein each of the plurality of page buffers senses a current amount, which varies according to a potential level of a corresponding bit line among the plurality of bit lines, at a sensing node to read data, and a precharge potential level at the sensing node is adjusted according to a temperature. | ||
| 地址 | Icheon-Si KR | ||