发明名称 |
Methods and apparatus for limiting a number of current changes while clock gating to manage power consumption of processor modules |
摘要 |
A dispatch module implemented in at least one of a memory or a processing device is operatively coupled to multiple processing modules, each having a first clock configuration and a second clock configuration. The dispatch module, at a first time, changes a first processing module included in the multiple processing modules from a first clock configuration to a second clock configuration. The dispatch module prohibits, at a second time within a predetermined time period and after the first time, a second processing module included in the multiple processing modules from changing from the first clock configuration to the second clock configuration if an indicator associated with a number of changes of the multiple processing modules between a first clock configuration and a second clock configuration within the predetermined time period and prior to the second time satisfies a criterion. |
申请公布号 |
US9477257(B1) |
申请公布日期 |
2016.10.25 |
申请号 |
US201313799210 |
申请日期 |
2013.03.13 |
申请人 |
JUNIPER NETWORKS, INC. |
发明人 |
Kulkarni Vaishali;Libby Jeffrey G.;Wagh Mihir |
分类号 |
G06F1/00;G06F1/08;G06F1/26;G06F1/04;G06F1/32;G06F3/06 |
主分类号 |
G06F1/00 |
代理机构 |
Cooley LLP |
代理人 |
Cooley LLP |
主权项 |
1. An apparatus, comprising:
a dispatch module implemented in at least one of a memory or a processing device, the dispatch module configured to be operatively coupled to a plurality of processing modules each having a first clock configuration and a second clock configuration, the dispatch module configured to change, at a first time during a predetermined time period, a processing module from the plurality of processing modules from the first clock configuration to the second clock configuration, the dispatch module configured to prohibit a change in clock configuration of each processing module from the plurality of processing modules from the first clock configuration to the second clock configuration at a second time after the first time and within the predetermined time period if an indicator associated with a number of clock configuration changes between a first clock configuration and a second clock configuration within the predetermined time period satisfies a criterion, the criterion being based on a threshold number of times an electric current changes, within the predetermined time period, for at least one of a chip package associated with the dispatch module or a power supply associated with the dispatch module. |
地址 |
Sunnyvale CA US |