INPUT/OUTPUT CIRCUIT

摘要

A circuit includes a first power node having a first voltage level, and an output node. A driver transistor coupled between the first power and output nodes is turned on and off responsive to first and second input signal edge types, respectively. A driver transistor source is coupled with the first power node. A contending circuit includes a slew rate detection circuit that generates a feedback signal based on an output node signal, and a contending transistor between a driver transistor drain and a second voltage. A contending transistor gate receives a control signal based on the feedback signal. The second voltage has a level less than the first voltage level if the output node signal rises responsive to the first input signal edge type, and greater than the first voltage level if the output node signal falls responsive to the first input signal edge type.

主权项

1. A circuit comprising:
a first power node configured to carry a first voltage having a first voltage level; an output node; a driver transistor coupled between the first power node and the output node, the driver transistor being configured to be turned on responsive to an edge of a first type of an input signal and to be turned off responsive to an edge of a second type of the input signal, the driver transistor having a source, a drain, and a gate, the source of the driver transistor being coupled with the first power node; and a contending circuit comprising:
a slew rate detection circuit configured to generate a feedback signal based on a signal at the output node; anda contending transistor between the drain of the driver transistor and a second voltage, the contending transistor having a gate configured to receive a control signal based on the feedback signal, and the second voltage having a second voltage level,
the second voltage level being less than the first voltage level if the signal at the output node rises responsive to the edge of the first type of the input signal, andthe second voltage level being greater than the first voltage level if the signal at the output node falls responsive to the edge of the first type of the input signal.