| 摘要 |
In a computer on the transmission side, an NW driver, which is recognized, by the OS, as an NIC driver, stores data to be transmitted and a destination SPA into a memory, and outputs a transaction layer packet (TLP), which has been generated by a first computer, to a PCIe switch. A first NIC logic of the PCIe switch of the PCIe switch corresponding to the first computer on the transmission side adds a system port address (SPA) to the TLP transferred from the first computer, and transfers the data of the TLP to a port associated with a second NIC logic and having an address indicated by the SPA (destination SPA). The second NIC logic having received the data writes the receive data into a memory of a second computer, on the reception side, which is connected to another PCIe switch where the second NIC logic exists. |
| 主权项 |
1. A computer system comprising:
a plurality of computers, each computer having at least a processor and associated memory, executing programs under an operating system (OS), and, a first Peripheral Component Interconnect express (PCIe) switch, which is connected to each of the plurality of computers, to communicate packets between the computers through the first PCIe switch, the first PCIe switch including:
an external port to which the computer is connected;an internal port to which a second PCIe switch is connected; anda first network interface card (NIC) logic to be recognized as an endpoint by the computer,wherein a unique system port address (SPA) associated with the destination bus number is allocated to the external port and the first NIC logic,wherein a first computer on the transmission side includes a first NW driver to be recognized as a driver of the NIC by the OS,wherein the first NW driver stores data to be transmitted and a destination SPA into a memory, and outputs a transaction layer packet (TLP) generated by the first computer to the second PCIe switch,wherein in the first PCIe switch, the first NIC logic adds the unique SPA to the TLP transferred from the first computer, and transfers data read from the memory to a second NIC logic having the destination SPA indicated by the unique SPA, andwherein the second NIC logic receives the data, and writes the received data into a memory of a second computer on the reception side that is connected to the second PCIe switch where the second NIC logic exists, wherein the first NIC logic issues a read TLP to divide and obtain data of the packet stored in the memory of the first computer, and transmits in sequence the obtained data to the second NIC logic, wherein the second NIC logic transmits the received data to the second computer connected to the second PCIe switch in the order of reception,
wherein the memory of the second computer includes:a plurality of first reception buffers for each network packet, where the first NW driver can write and read data; anda second reception buffer that can store data of every network packet,wherein the second computer writes the received data into one or more of the plurality of first reception buffers or the second reception buffer in the order of reception, and wherein the first NW driver reconstructs the data stored in the one or more first reception buffers or the second reception buffer into a network packet in the order of arrival time, wherein the first NW driver of the first computer generates information of the destination SPA added to the TLP to indicate a destination to which the packet is transferred, a frame length indicating the frame length of the packet, a length of each chunk which is the unit into which the packet information is divided, and a list of the addresses of the chunks,
wherein the memory of the first computer stores the generated information of the destination SPA, the packet frame length, the length of each of the chunks, and the list of the addresses of the chunks,wherein in the first PCIe switch, the each port and the NIC logic have a register range for storing the range of the destination SPA of TLP that can pass through the external port from the inside of the first PCIe switch to the outside, andwherein the first NIC logic of the first PCIe switch reads each of the chunks stored in the memory, performs routing using the unique SPA by referring to the range register within the network of the PCIe switch, and transmits the each chunk to the second NIC logic corresponding to the second computer determined from the list of the addresses of the chunks. |
