发明名称 |
MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME |
摘要 |
A memory device that is as small in area as possible and has an extremely long data retention period. A transistor with extremely low leakage current is used as a cell transistor of a memory element in a memory device. Moreover, in order to reduce the area of a memory cell, the transistor is formed so that its source and drain are stacked in the vertical direction in a region where a bit line and a word line intersect each other. Further, a capacitor is stacked above the transistor. |
申请公布号 |
US2016358923(A1) |
申请公布日期 |
2016.12.08 |
申请号 |
US201615240328 |
申请日期 |
2016.08.18 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
MATSUBAYASHI Daisuke |
分类号 |
H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a bit line over an insulating surface; forming a semiconductor layer over the bit line, the semiconductor layer being prism-shaped or cylinder-shaped, and comprising a semiconductor material having a wider band gap than silicon; forming a gate insulating layer covering the bit line and the semiconductor layer; forming a word line covering at least part of a side face of the semiconductor layer with the gate insulating layer interposed therebetween; removing a part of the gate insulating layer so as to expose a top surface of the semiconductor layer; forming a capacitor electrode in contact with the top surface of the semiconductor layer; and stacking, in that order, an insulating layer and a capacitor line over the capacitor electrode. |
地址 |
Atsugi-shi JP |