MEMORY CONTROLLER FOR EXECUTING READ/WRITE COMMAND WITHOUT ORDER

摘要

PURPOSE: A memory controller for executing a read/write command without an order is provided to continue processing without waiting the terminal of the write command by posting the write command. CONSTITUTION: The memory controller(202) includes a buffer(204) temporary storing a write address for each write access request and the relating data until the relating data is written to a DRAM system, and an access sequence control circuit selecting one address and data from a plurality of write access requests as a next access for the DRAM system. The stored address and data is stored in the buffer by the order confronting to the order of write access request. The access sequence control circuit includes a comparator(230) discriminating the write access request having respective row address the same as the row address of present access and an access select circuit selecting one from the discriminated write access regardless of selecting a non-discriminated write access request before selecting a discriminated write access request.