SEMICONDUCTOR INTEGRATED CIRCUIT, DESIGN METHOD AND DESIGN DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND DESIGN PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a design method or the like for a semiconductor integrated circuit, capable of preventing addition of a large number of buffers to a clock tree. SOLUTION: This design device for the semiconductor integrated circuit has: a net list recording part 4 recording a net list; a self-library recording part 5 for recording a self-library; a layout processing part 6 performing layout processing on the basis of the net list and the self-library; a timing simulation processing part 7 performing timing simulation to a laid-out circuit; a cell replacement processing part 8 replacing one scan flip-flop cell by a cell having a scan test function and a hold error prevention function when it is detected that a hold error occurs between a pair of scan flip-flop cells in the timing simulation; and a wiring line redrawing processing part 9 redrawing a wiring line affected by the replacement of the cell. COPYRIGHT: (C)2007,JPO&INPIT