unidade funcional para contagem de zeros à esquerda de vetor, zeros à direita de vetor, 1s de operando de vetor e cálculo de paridade de vetor

摘要

A method of performing vector operations on a semiconductor chip is described. The method includes performing a first vector instruction with a vector functional unit implemented on the semiconductor chip and performing a second vector instruction with the vector functional unit. The first vector instruction is a vector multiply add instruction. The second vector instruction is a vector leading zeros count instruction.