发明名称 Semiconductor ESD circuit and method
摘要 In an embodiment, an electrostatic discharge (ESD) circuit for providing protection between a first node and a second node includes a first MOS device having a first source/drain coupled to a first node, and a second source/drain coupled to an intermediate node. The ESD circuit also includes a first capacitor coupled between a gate of the first MOS device and the first node, a first resistor coupled between the gate of the first MOS device the intermediate node, a second MOS device having a first source/drain coupled to the intermediate node, and a second source/drain coupled to the second node, a second capacitor coupled between a gate of the second MOS device and the first node, and a second resistor coupled between the gate of the second MOS device and the second node.
申请公布号 US9478979(B2) 申请公布日期 2016.10.25
申请号 US201514690739 申请日期 2015.04.20
申请人 Infineon Technologies AG 发明人 Domanski Krzysztof;Soldner Wolfgang;Russ Cornelius Christian;Alvarez David;Ille Adrien
分类号 H02H9/00;H02H9/04;H01L27/02;H01L29/06;H01L29/10 主分类号 H02H9/00
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. An electrostatic discharge (ESD) circuit comprising: a first MOS device having a first source/drain coupled to a first node, and a second source/drain coupled to an intermediate node; a first capacitor coupled between a gate of the first MOS device and the first node; a first resistor coupled between the gate of the first MOS device and the intermediate node; a second MOS device having a first source/drain coupled to the intermediate node, and a second source/drain coupled to a second node, wherein the first node, the second node and the intermediate node are separate nodes, and the first MOS device has a same polarity type as the second MOS device; a second capacitor coupled between a gate of the second MOS device and the first node; and a second resistor coupled between the gate of the second MOS device and the second node, wherein the ESD circuit is configured to provide protection between the first node and the second node, wherein the intermediate node only has operative direct connections to the first MOS device, the second MOS device, the first resistor, and parasitic bipolar devices of the ESD circuit.
地址 Neubiberg DE