Integrated circuits and semiconductor systems including the same

摘要

A integrated circuit may include an input buffer suitable for buffering a strobe signal in response to a buffer enablement signal to generate an internal strobe signal, an internal clock generator suitable for receiving the internal strobe signal to generate internal clock signals including different phases. The integrated circuit may include a strobe signal driver suitable for driving the strobe signal in response to a drive control signal. The drive control signal may be enabled prior to the buffer enablement signal being enabled.

主权项

1. An integrated circuit comprising:
an input buffer suitable for buffering a strobe signal in response to a buffer enablement signal to generate an internal strobe signal; an internal clock generator suitable for receiving the internal strobe signal to generate internal clock signals including different phases; and a strobe signal driver suitable for driving the strobe signal in response to a drive control signal, wherein the drive control signal is enabled prior to the buffer enablement signal being enabled, wherein the buffer enablement signal is enabled in synchronization with a termination control signal, wherein the termination control signal controls an activation of a termination resistor, wherein the internal clock signals include a first internal clock signal, a second internal clock signal, a third internal clock signal and a fourth internal clock signal; and wherein the internal clock generator includes: a first clock buffer suitable for inversely buffering the first and second internal clock signals in response to the internal strobe signal to generate the third and fourth internal clock signals; and a second clock buffer suitable for inversely buffering the third and fourth internal clock signals in response to the internal strobe signal to generate the first and second internal clock signals.