发明名称 METHOD FOR CONTROLLING LOGICAL PHYSICAL ADDRESS CONVERSION TABLE, AND MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the size of a RAM in which a logical physical address conversion table is stored, and to reduce an access overhead as well.SOLUTION: Provided is a memory device equipped with a NAND type flash memory 1 and a RAM in which a logical physical address conversion table 21 for converting logical addresses to physical addresses is stored and including a controller 2 for controlling access to the NAND type flash memory, wherein the RAM is provided with table control means 22 that stores a logical physical address conversion table 21 in which M address sets (M=integer smaller than a total number of pages), each including a sector address indicating one sector in a page, are provided as an address set for converting one logical address into one physical address, and which controls the exchanging of address sets for each set on the basis of reference frequency information on each of the address sets.SELECTED DRAWING: Figure 1
申请公布号 JP2016212713(A) 申请公布日期 2016.12.15
申请号 JP20150097039 申请日期 2015.05.12
申请人 TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP 发明人 HONMA TOMOKAZU;FUJIGAKI TAMIKI
分类号 G06F12/02;G06F12/00 主分类号 G06F12/02
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