发明名称 |
RESISTANCE VARIABLE MEMORY STRUCTURE AND METHOD OF FORMING THE SAME |
摘要 |
A method includes forming a protection material over a conductive structure, an opening over the structure is partially filled with a first electrode material to form a first electrode; a resistance variable layer and a second electrode material are also formed in the opening. The second electrode material and the resistance variable layer are patterned to form a memory element. The method includes forming an interlayer dielectric over the memory element and the periphery region of the substrate and disposing contacts in the interlayer dielectric. |
申请公布号 |
US2016225988(A1) |
申请公布日期 |
2016.08.04 |
申请号 |
US201615094371 |
申请日期 |
2016.04.08 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Tu Kuo-Chi;Chang Chih-Yang;Chen Hsia-Wei;Liao Yu-Wen;Yang Chin-Chieh;Chu Wen-Ting |
分类号 |
H01L45/00 |
主分类号 |
H01L45/00 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming a semiconductor device, comprising:
forming a protection material over a conductive structure disposed on a substrate, wherein the protection material is formed in a memory region and a periphery region of the substrate; etching an opening in the protection material exposing a top surface of the conductive structure in the memory region; depositing a first conductive material in the opening; etching back the deposited first conductive material such that a top surface of the deposited first conductive material in the opening is lower than a top surface of the protection material; forming a resistance variable layer and a second conductive material in the opening on the etched back first conductive material; forming a memory structure by patterning the second conductive material, the resistance variable layer and the protective layer such that a sidewall of each of the second conductive material, the resistance variable layer and the protective layer are coplanar; depositing a dielectric layer over the memory structure and the periphery region of the substrate; and forming a first contact plug in the dielectric layer interfacing with the memory structure and a second, coplanar, contact plug in the dielectric layer of the periphery region of the substrate. |
地址 |
Hsin-Chu TW |