Memory devices having low permittivity layers and methods of fabricating the same

摘要

A memory device is provided. The memory device includes bit lines that extend in a first direction on a substrate, word lines configured to vertically cross the bit lines, memory cells formed at intersections of the bit lines and the word lines, a first low permittivity layer configured to fill spaces between the bit lines and partially fill spaces between the memory cells formed on bottom surfaces of the word lines, a first dielectric layer stacked on an upper surface of the first low permittivity layer between the memory cells, a second dielectric layer configured to fill spaces between the memory cells formed on upper surfaces of the bit lines, and a second low permittivity layer stacked on an upper surface of the second dielectric layer and configured to fill spaces between the word lines. The first and second low permittivity layers have lower permittivity than the first and second dielectric layers.

主权项

1. A memory device, comprising:
bit lines extending in a first direction on a substrate; word lines configured to vertically cross the bit lines; memory cells at intersections of the bit lines and the word lines; a first low permittivity layer filling spaces between the bit lines and partially filling spaces between the memory cells on bottom surfaces of the word lines; a first dielectric layer stacked on an upper surface of the first low permittivity layer between the memory cells; a second dielectric layer filling spaces between the memory cells on upper surfaces of the bit lines; and a second low permittivity layer stacked on an upper surface of the second dielectric layer and filling spaces between the word lines, wherein the first and second low permittivity layers have lower permittivity than the first and second dielectric layers.